Gate array

Results: 1402



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111Microsoft Word - dlp-hs-fpga-ds-v14.doc

Microsoft Word - dlp-hs-fpga-ds-v14.doc

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Source URL: www.ftdichip.com

Language: English - Date: 2012-05-14 07:24:52
112Vivado Design Suite Tool Flow FPGA 1 FPGA-VDF-ILT (v1.0) Course Specification

Vivado Design Suite Tool Flow FPGA 1 FPGA-VDF-ILT (v1.0) Course Specification

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Source URL: www.xilinx.com

Language: English - Date: 2015-05-21 13:22:32
113Compact Muon Solenoid / Numbers / Field-programmable gate array / LHCb / Electronic engineering / Xilinx / Array / Muon / Golden ratio / CERN / Large Hadron Collider / Physics

Computing in High Energy and Nuclear Physics, La Jolla, California, March 24-28, A 3-D Track-Finding Processor for the CMS Level-1 Muon Trigger D.Acosta, B.Scurlock*, A.Madorsky, H.Stoeck, S.M.Wang

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Source URL: www.phys.ufl.edu

Language: English - Date: 2004-04-28 16:05:17
114Electronic engineering / Electronics / Field-programmable gate array / Xilinx / LHCb / Muon / Joint Test Action Group / Compact Muon Solenoid / CERN / Large Hadron Collider / Physics

The Track-Finding Processor for the Level-1 Trigger of the CMS Endcap Muon System D. Acosta, A. Madorsky (), B. Scurlock, S.M. Wang University of Florida A. Atamanchuk, V. Golovtsov, B. Razmyslovich,

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Source URL: www.phys.ufl.edu

Language: English - Date: 2001-10-15 11:21:52
115A 3-D Track-Finding Processor for the CMS Level-1 Muon Trigger D. Acosta, V. Golovtsov, M. Kan, A. Madorsky, B. Scurlock, H. Stoeck, L. Uvarov, S.M. Wang Outline

A 3-D Track-Finding Processor for the CMS Level-1 Muon Trigger D. Acosta, V. Golovtsov, M. Kan, A. Madorsky, B. Scurlock, H. Stoeck, L. Uvarov, S.M. Wang Outline

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Source URL: www.phys.ufl.edu

Language: English - Date: 2003-04-10 13:53:41
116Microcontroller Technical Information PG-FP5 Flash Memory Programmer Document No.

Microcontroller Technical Information PG-FP5 Flash Memory Programmer Document No.

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Source URL: tool-support.renesas.com

Language: English - Date: 2011-07-12 01:22:19
117Status of the CSC Trigger  Darin Acosta University of Florida  Outline

Status of the CSC Trigger Darin Acosta University of Florida Outline

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Source URL: www.phys.ufl.edu

Language: English - Date: 2002-04-14 09:46:36
118Microsoft Word - DLP-FPGA Datasheet v13.doc

Microsoft Word - DLP-FPGA Datasheet v13.doc

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Source URL: www.ftdichip.com

Language: English - Date: 2012-05-14 07:24:51
119From SP02 to SP04 Lev Uvarov UF Muon Trigger Meeting January 8, 2004

From SP02 to SP04 Lev Uvarov UF Muon Trigger Meeting January 8, 2004

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Source URL: www.phys.ufl.edu

Language: English - Date: 2004-02-04 09:07:42
120Products  BMX Module Embedded Control and Measurement Platform

Products BMX Module Embedded Control and Measurement Platform

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Source URL: www.sea-gmbh.com

Language: English - Date: 2012-07-02 05:07:00